This register can only be written if WPCFGEN is cleared in
ISC_WPMR.
Name:
ISC_CLKCFG
Offset:
0x24
Reset:
0x00000000
Property:
Read/Write
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
MCDIV[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
Access
Reset
Bits 23:16 – MCDIV[7:0] Camera Sensor Reference Clock
Divider
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