This register can only be written if WPCFGEN is cleared in
ISC_WPMR.
Name:
ISC_WB_G_RGR
Offset:
0x68
Reset:
0x00000000
Property:
Read/Write
Bit
31
30
29
28
27
26
25
24
GRGAIN[12:8]
Access
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
GRGAIN[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
RGAIN[12:8]
Access
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
RGAIN[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 28:16 – GRGAIN[12:0] Green Component (Red row) Gain (unsigned 13 bits,
0:4:9)
Bits 12:0 – RGAIN[12:0] Red Component Gain (unsigned 13 bits,
0:4:9)
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