43.19 Sigma-Delta Analog-to-Digital Converter (SDADC) Electrical Specifications

Table 43-26. SDADC Electrical Specifications
AC CHARACTERISTICS Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated)

Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No. Symbol Characteristics Min. Typical Max. Units Conditions
Device Supply
SDADC_1 VDDANA ADC Module Supply 2.7V — 5.5V V VDD = VDDIO
Reference Inputs
SDADC_3 VREF(2) ADC Reference Voltage 2.7 — VDDANA V VREF = VDDANA (REFCTRL.REFSEL = 0x3)
2.4 VDDANA V VREF ≤ VDDANA

VREF = INTREF (REFCTRL.REFSEL = 0x0)

VREF = VREFB pin (REFCTRL.REFSEL = 0x1)

VREF = DAC output (REFCTRL.REFSEL = 0x2)
Analog Input Range
SDADC_7 AFS Full-Scale Analog Input Signal Range (Single-Ended (1)) GNDANA — +VREF V VREF<VDDANA-0.3V, Gaincorr = 0x1
SDADC_8 GNDANA — +0.7 * VREF V VREF> = VDDANA-0.3V, Gaincorr = 0x1
SDADC_9 Full-Scale Analog Input Signal Range (Differential) -VREF — +VREF V VREF<VDDANA-0.3V, Gaincorr = 0x1
SDADC_10 -0.7*VREF — +0.7 * VREF V VREF> = VDDANA-0.3V, Gaincorr = 0x1
SDADC_11 Vcom Input Common mode voltage GNDANA — AFS(max) V Differential mode
Note:
  1. This mode corresponds to a differential mode where the selected AINx pin is externally grounded.
  2. SDADC functional device operation with either internal or external VREF < 2.4V is functional, but not characterized. SDADC will function, but with degraded accuracy of approximately ~((0.06 * 2n) /VREF). Where "n" = #bits. SDADC accuracy is limited by internal VREF accuracy + drift, MCU generated noise plus users application noise or accuracy on VDDANA, GNDANA.
Table 43-27. SDADC Differential Mode Electrical Specifications
AC CHARACTERISTICS Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated)

Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No. Symbol Characteristics Min. Typical Max. Units Conditions
DIFFERENTIAL MODE ADC Accuracy
DSDADC_11 Res Resolution 16 bits —
DSDADC_13 ENOB (1,2,3,5) Effective Number of bits 13 — — bits FTP(max), REFCTRL.REFSEL = 0x3 = VDDANA

VREF = VDDANA = 5.0V
DSDADC_19 INL(3,5) Integral Nonlinearity -7.9 — 8.7 LSb
DSDADC_25 DNL(3,5) Differential Nonlinearity -1.0 — 3.3 LSb
DSDADC_31 GERR (3,5) Gain Error -771 — 343 LSb
DSDADC_37 EOFF(3,5) Offset Error -229 — 164 LSb
DIFFERENTIAL MODE ADC Dynamic Performance
DSDADC_49 SINAD (1,2,3,5) Signal to Noise and Distortion 80.1 — — dB FTP(max), REFCTRL.REFSEL = 0x3 = VDDANA

VREF = VDDANA = 5.0V
DSDADC_51 SNR (1,2,3,6) Signal to Noise ratio 85.0 — —
DSDADC_53 DR (1,2,3,6) Dynamic Range 78.0 — —
DSDADC_55 THD (1,2,3,4,5) Total Harmonic Distortion — — -77.3
Note:
  1. Characterized with an analog input sine wave at 500Hz with OSR = 256.
  2. Sinewave peak amplitude = -3dB SDADC_ Full Scale amplitude input with 16bit resolution.
  3. Spec values collected under the following additional conditions:
    • All registers at reset default value otherwise not mentioned
  4. Value taken over 7 harmonics.
  5. Differential input mode, OSR = 256, SDADC Clock Period=166.7 ns (6 MHz), Chopper OFF (ANACTRL.ONCHOP = 0).
Table 43-28. SDADC Conversion Timing Requirements
AC CHARACTERISTICS Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated)

Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No. Symbol Characteristics Min. Typical Max. Units Conditions
SDADC_ Clock Requirements
SDADC_57 TAD SDADC Clock Period 166.7 — 1000 ns —
SDADC_58 fGCLK_SDADC SDADC Module GCLK max input freq — — 48 MHz —
SDADC_60 OSR Oversampling ratio 64 256 1024 TAD
SDADC Differential Mode Throughput Rates
SDADC_61 FTP Throughput Rate (1) Free Running mode — — 1/(TAD*4*OSR) ksps CTRLC.FREERUN = 1
Throughput Rate (1) Single Shot mode — — 1/(TAD*4*(N+1)*OSR) CTRLC.FREERUN = 0, N = SKPCNT
Note:
  1. SDADC Throughput Rate FTP is divided by # of user active analog inputs in use on specific target SDADC module.
Table 43-29. SDADC Sample Timing Requirements
AC CHARACTERISTICS Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated)

Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
Param. No. Symbol Characteristics Min. Typical Max. Units Conditions
SDADC_63 SKPCNT skip count (1) 2 — 15 TAD register bits: CTRLB.SKPCNT[3:0]
SDADC_67 TCNV Conversion Time (1/FTP)/TAD TAD —
SDADC_69 CSAMPLE Internal Sample Cap 0.425 0.5 0.575 pF —
SDADC_71 RSAMPLE Internal input impedance 1/(Csample*1/(4*TAD)) kΩ Differential mode
1/(2 * Csample*1/(4*TAD)) Single-Ended mode
SDADC_72 Rext Input anti-aliasing filter recommendation (2) — 1 — kΩ —
Cext 3.3 — 10 nF —
Note:
  1. Number of skip samples before retrieve the first valid sample. The first valid sample starts from the (SKPCNT+1)th sample onward.
  2. External anti-alias filter must be placed in front of each SDADC input to ensure high-frequency signals to not alias into measurement bandwidth. Use capacitors of X5R type for DC measurement, or capacitors of COG or NPO type for AC measurement.