43.18 Analog-to-Digital Converter (ADC) Electrical Specifications

Table 43-21. ADC Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
Device Supply
ADC_1	VDDANA	ADC Module Supply	2.7V	—	5.5V	V	VDD = VDDIO
Reference Inputs
ADC_3	VREF⁽¹⁾	ADC Reference Voltage	2.7 ⁽¹⁾	—	VDDANA	V	V_REF = VDDANA (REFCTRL.REFSEL = 0x5)
ADC_3	VREF⁽¹⁾	ADC Reference Voltage	2.4⁽¹⁾	—	VDDANA - 0.6V	V	VDDANA ≥ V_REF + 0.6V, V_REF = INTREF (REFCTRL.REFSEL = 0x0), V_REF = VDDANA /1.6 (REFCTRL.REFSEL = 0x1), V_REF = VDDANA / 2 (REFCTRL.REFSEL = 0x2), V_REF = VREFA pin (REFCTRL.REFSEL = 0x3), V_REF = DAC output (REFCTRL.REFSEL = 0x4)
Analog Input Range
ADC_7	AFS	Full-Scale Analog Input Signal Range (Single-Ended)	GNDANA	—	VREF	V	—
ADC_9	AFS	Full-Scale Analog Input Signal Range (Differential)	-VREF	—	VREF	V	—
ADC_10	VCMIN	Input common mode voltage	0.2	—	VREF-0.2	V	CTRLC.R2R = 1
ADC_10	VCMIN	Input common mode voltage	VREF/2 - 0.2	—	VREF/2 + 0.2	V	CTRLC.R2R = 0
ADC_11	TSETTLING	ADC Stabilization Time	—	10	—	µs	CTRLA.ENABLE = 1 or CTRLA.ONDEMAND = 1
Note: ADC functional device operation with either internal or external VREF < 2.4V is functional, but not characterized. ADC will function, but with degraded accuracy of approximately ~((0.06 * 2n) / VREF), where "n" = #bits. ADC accuracy is limited by internal VREF accuracy + drift, MCU generated noise plus users application noise/accuracy on VDDANA, GNDANA.

Table 43-22. Single Ended Mode ADC Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
SINGLE ENDED MODE ADC Accuracy
SADC_11	Res	Resolution	8	—	12	bits	Selectable 8, 10, 12 bit Resolution Ranges
SADC_13a	ENOB ^(1,2,3)	Effective Number of bits	9.4	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
SADC_13b			9.4	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V
SADC_13c			9.4	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
SADC_13d			9	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V
SADC_19	INL⁽³⁾	Integral Nonlinearity	-4.5	—	4.5	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
SADC_19b			-4.2	—	4.2	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V ⁽⁵⁾
SADC_19c			-4.2	—	4.2	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V ⁽⁶⁾
SADC_19d			-6.5	—	6.5	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
SADC_25a	DNL⁽³⁾	Differential Nonlinearity	-0.99	—	1.5	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
SADC_25b			-0.99	—	1.6	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V ⁽⁵⁾
SADC_25c			-0.99	—	1.5	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V ⁽⁶⁾
SADC_25d			-0.99	—	2.1	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
SADC_31a	GERR ⁽³⁾	Gain Error	-12	—	2	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
SADC_31b			-16	—	5	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V ⁽⁵⁾
SADC_31c			-28	—	18	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF= VREFA = 3.0V⁽⁶⁾
SADC_31d			-131	—	65	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
SADC_37a	EOFF⁽³⁾	Offset Error	-42	—	47	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
SADC_37b			-39	—	51	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V ⁽⁵⁾
SADC_37c			-41	—	54	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V ⁽⁶⁾
SADC_37d			-39	—	51	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
SADC_43a	TUE⁽³⁾	Total Unadjusted Error	3.5	—	27	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
SADC_43b			3.1	—	30	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V ⁽⁵⁾
SADC_43c			2.7	—	29	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V ⁽⁶⁾
SADC_43d			6.9	—	91	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
SINGLE ENDED MODE ADC Dynamic Performance
SADC_49a	SINAD ^(1,2,3)	Signal to Noise and Distortion	58	—	—	dB	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
SADC_49b			58	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V
SADC_49c			58	—	—		1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
SADC_49d			56	—	—		1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V
SADC_51a	SNR^(1,2,3)	Signal to Noise ratio	59	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
SADC_51b			59	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V
SADC_51c			59	—	—		1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
SADC_51d			55	—	—		1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V
SADC_53a	SFDR^(1,2,3)	Spurious Free Dynamic Range	64	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
SADC_53b			65	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V
SADC_53c			64	—	—		1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
SADC_53d			63	—	—		1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V
SADC_55a	THD^(1,2,3,4)	Total Harmonic Distortion	—	—	-63		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
SADC_55b			—	—	-63		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V
SADC_55c			—	—	-62		1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
SADC_55d			—	—	-63		1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V
Note: Characterized with an analog input sine wave = (FTP(max) / 100). For example, FTP(max)=1Msps/100 = 10kHz sine wave. Sine wave peak amplitude = 96% ADC Full Scale amplitude input with 12bit resolution. Spec values collected under the following additional conditions: 12bit resolution mode. All registers at reset default value otherwise not mentioned. Value taken over 7 harmonics. SAMPCTRL.OFFCOMP = 0, SAMPCTRL.SAMPLEN = [5:0] = 3. SAMPCTRL.OFFCOMP = 0 and REFCTRL.REFCOMP = 0 , SAMPCTRL.SAMPLEN = [5:0] = 3.

Table 43-23. Differential Mode ADC Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
DIFFERENTIAL MODE ADC Accuracy
DADC_11	Res	Resolution	8	—	12	bits	Selectable 8, 10, 12 bit Resolution Ranges
DADC_13a	ENOB ^(1,2,3)	Effective Number of bits	10.5	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
DADC_13b			10.5	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V
DADC_13c			10.4	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
DADC_13d			9.9	—	—	bits	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V
DADC_19a	INL ⁽³⁾	Integral Nonlinearity	-2.2	—	2.2	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
DADC_19b			-2.0	—	2.0	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V ⁽⁵⁾
DADC_19c			-2.2	—	2.2	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V ⁽⁶⁾
DADC_19d			-6.0	—	6.0	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
DADC_25a	DNL ⁽³⁾	Differential Nonlinearity	-0.99	—	1.2	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
DADC_25b			-0.99	—	1.3	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF= VDDANA = 3.3V ⁽⁵⁾
DADC_25c			-0.99	—	1.3	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V ⁽⁶⁾
DADC_25d			-0.99	—	6.0	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
DADC_31a	GERR ⁽³⁾	Gain Error	-1	—	5	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
DADC_31b			-4	—	7	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V ⁽⁵⁾
DADC_31c			-21	—	25	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V ⁽⁶⁾
DADC_31d			-125	—	73	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
DADC_37a	EOFF ⁽³⁾	Offset Error	-5	—	6	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
DADC_37b			-6	—	8	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V ⁽⁵⁾
DADC_37c			-7	—	11	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V ⁽⁶⁾
DADC_37d			-6	—	8	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
DADC_43a	TUE ⁽³⁾	Total Unadjusted Error	1.7	—	5.0	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V ⁽⁵⁾
DADC_43b			1.5	—	4.5	LSb	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V ⁽⁵⁾
DADC_43c			2.1	—	6.4	LSb	1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V ⁽⁶⁾
DADC_43d			2.4	—	41	LSb	1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V ⁽⁶⁾
DIFFERENTIAL MODE ADC Dynamic Performance
DADC_49a	SINAD ^(1,2,3)	Signal to Noise and Distortion	64	—	—	dB	1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
DADC_49b			65	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V
DADC_49c			64	—	—		1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
DADC_49d			61	—	—		1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V
DADC_51a	SNR ^(1,2,3)	Signal to Noise ratio	65	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
DADC_51b			65	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V
DADC_51c			65	—	—		1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
DADC_51d			61	—	—		1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V
DADC_53a	SFDR ^(1,2,3)	Spurious Free Dynamic Range	70	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
DADC_53b			71	—	—		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF= VDDANA = 3.3V
DADC_53c			69	—	—		1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
DADC_53d			69	—	—		1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF = INTREF = 4.096V
DADC_55a	THD ^(1,2,3,4)	Total Harmonic Distortion	—	—	-70		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 5.0V
DADC_55b			—	—	-70		1 Msps, REFCTRL.REFSEL = 0x5 = VDDANA V_REF = VDDANA = 3.3V
DADC_55c			—	—	-69		1 Msps, REFCTRL.REFSEL = 0x3 = VREFA pin VDDANA = 5.0V V_REF = VREFA = 3.0V
DADC_55d			—	—	-69		1 Msps, REFCTRL.REFSEL = 0x0 = INTREF VDDANA = 5.0V Internal V_REF= INTREF = 4.096V
Note: Characterized with an analog input sine wave = (FTP(max) / 100). Example: FTP(max)=1Msps/100 = 10Khz sine wave. Sinewave peak amplitude = 96% ADC_ Full Scale amplitude input with 12bit resolution c) 12bit resolution mode. Spec values collected under the following additional conditions: 12bit resolution mode All registers at reset default value otherwise not mentioned Value taken over 7 harmonics. SAMPCTRL.OFFCOMP=1. SAMPCTRL.OFFCOMP=1 and REFCTRL.REFCOMP=1.

Table 43-24. ADC Conversion Timing Requirements
AC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
ADC_ Clock Requirements
ADC_57	TAD	ADC Clock Period	62.5	—	6250	ns
ADC_58	fGCLK_ADCx	ADCx Module GCLK max input freq	—	—	48	MHz
ADC Single-Ended Throughput Rates
ADC_59	FTP (Single-Ended Mode)	Throughput Rate ⁽³⁾(Single-Ended)	—	—	1.231	Msps	12-bit resolution, Rsource ≤298 Ω, SAMPCTRL.SAMPLEN=0 ⁽¹⁾
			—	—	1.333		10-bit resolution, Rsource ≤633 Ω, SAMPCTRL.SAMPLEN=0 ⁽¹⁾
			—	—	1.6		8-bit resolution, Rsource ≤1,103 Ω, SAMPCTRL.SAMPLEN=0 ⁽¹⁾
			—	—	1	Msps	12-bit resolution, Rsource ≤6,335Ω SAMPCTRL.SAMPLEN=n/a ⁽²⁾
			—	—	1.067		10-bit resolution, Rsource ≤7,677 Ω SAMPCTRL.SAMPLEN=n/a⁽²⁾
			—	—	1.231		8-bit resolution, Rsource ≤9,556 Ω SAMPCTRL.SAMPLEN=n/a⁽²⁾
ADC Differential Mode Throughput Rates
ADC_61	FTP (Differential Mode)	Throughput Rate ⁽³⁾ (Differential Mode)	—	—	1.231	Msps	12-bit resolution, Rsource ≤298 Ω, SAMPCTRL.SAMPLEN=0 ⁽¹⁾
			—	—	1.455		10-bit resolution, Rsource ≤633 Ω, SAMPCTRL.SAMPLEN=0⁽¹⁾
			—	—	1.778		8-bit resolution, Rsource ≤1,103 Ω, SAMPCTRL.SAMPLEN=0 ⁽¹⁾
			—	—	1	Msps	12-bit resolution, Rsource ≤6,335Ω SAMPCTRL.SAMPLEN=n/a ⁽²⁾
			—	—	1.143		10-bit resolution, Rsource ≤7,677 Ω SAMPCTRL.SAMPLEN=n/a ⁽²⁾
			—	—	1.333		8-bit resolution, Rsource ≤9,556 Ω SAMPCTRL.SAMPLEN=n/a ⁽²⁾
Note: ADC Sample time = ((SAMPCTRL.SAMPLEN + 1) * TAD) and SAMPCTRL.OFFCOMP=0. ADC HDW forces sample time to 4TAD when SAMPCTRL.OFFCOMP=1, user SAMPCTRL.SAMPLEN is ignored. ADC Throughput Rate FTP = ((1 / ((TSAMP + TCNV) TAD)) / (# of user active analog inputs in use on specific target ADC module)).

Table 43-25. ADC Sample Timing Requirements
AC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
ADC_63	TSAMP	ADC Sample Time ^(1,2,3)	1 ⁽¹⁾	—	—	TAD	12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 298 Ω
							10-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 633 Ω
							8-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 1,103 Ω
			2 ⁽¹⁾	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 2,310 Ω
							10-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 2,981 Ω
							8-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 3,921 Ω
			3⁽¹⁾	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 4,323 Ω
							10-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 5,329 Ω
							8-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 6,738 Ω
			4^(1,2)	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 6,335 Ω
							10-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 7,678 Ω
							8-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 9,556 Ω
			5 ⁽¹⁾	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 8,348 Ω
							10-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 10,026 Ω
							8-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 12,374 Ω
			6 ⁽¹⁾	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 10,361 Ω
							10-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 12,374 Ω
							8-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 15,192 Ω
ADC_65	TCNV	Conversion Time ⁽³⁾ (Single-Ended Mode)	12			TAD	12-bit resolution
			11				10-bit resolution
			9				8-bit resolution
ADC_67		Conversion Time ⁽³⁾ (Differential Mode)	12			TAD	12-bit resolution
			10				10-bit resolution
			8				8-bit resolution
ADC_69	CSAMPLE	ADC Internal Sample Cap	—	—	3.2	pF
ADC_71	RSAMPLE	ADC Internal impedance	—	—	1715	Ω
Note: When SAMPCTRL.OFFCOMP = 0: TSAMP = (((RSAMPLE + RSOURCE) * CSAMPLE * ((#Bits Resolution+2) * ln(2)))) / TAD)+1 rounded down to nearest whole integer User SAMPCTRL.SAMPLEN = (TSAMP - 1) When SAMPCTRL.OFFCOMP = 1: TSAMP = 4 (Forced by HDW) User SAMPCTRL.SAMPLEN = (n/a, Ignored by HDW) ADC Throughput Rate FTP = ((1 / ((TSAMP + TCNV) * TAD)) / (# of user active analog inputs in use on specific target ADC module)).