43.17 Digital-to-Analog Converter (DAC) Electrical Specifications
| AC CHARACTERISTICS | Standard
Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise
stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial |
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| Param. No. | Symbol | Characteristics | Min. | Typical | Max. | Units | Conditions | |
| DAC_1 | DRES | DAC Resolution | — | — | 10 | Bits | — | |
| DAC_3 | DCLK | Internal DAC Clock Frequency (GCLK_DAC) | — | — | 48 | MHz | VDDANA = 2.7V | |
| DAC_5 | DSAMP | DAC Sampling Rate | — | — | 350 | ksps | +/-4 LSB of final value for step size ≤100 LSb @ CLOAD & RLOAD w/VDDANA = 5.0V | |
| DAC_7 | VOUT | Output Voltage Range | GNDANA+0.05V | — | VDDANA-0.05V | V | Ext Pin (Buffered) VREFA = VDDANA @ CLOAD & RLOAD | |
| GNDANA+0.05V | — | VREF | V | Ext Pin (Buffered) @ CLOAD & RLOAD (VREFA < (VDDANA-50 mv)) | ||||
| GNDANA | — | VREF | V | Internal connection to another module (for example, AC) (No buffer) | ||||
| DAC_9 | VREF (1,2) | DAC Reference Input Option (1,2) | VDDANA CTRLB.REFSEL = 0x1 | VDDANA | V | — | ||
| VREFA pin CTRLB.REFSEL = 0x2 | 2.4V (1,2) | — | VDDANA - 0.6V | V | VDDANA ≥ VREF + 0.6V | |||
| INTREF CTRLB.REFSEL = 0x0 | 2.4V (1,2) | VR_1 | VDDANA - 0.6V | V | See parameter VR_1 | |||
| DAC_11 | CLOAD | DAC Out max load to meet VOUT & TSET | — | — | 100 | pF | — | |
| DAC_13 | RLOAD | DAC Out max load to meet VOUT & TSET | 5 | — | — | kΩ | — | |
| SINGLE ENDED MODE (1,2,3) | ||||||||
| SDAC_19 | INL(4) | Integral Non Linearity | -1.2 | — | 1.2 | LSB | CTRLB.REFSEL = 0x1 VREF = VDDANA = 5.0V w/ CLOAD & RLOAD |
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| -1.2 | — | 1.2 | LSB | CTRLB.REFSEL = 0x2 VDDANA = 5.0V VREF = VREFA pin = 3.0V w/ CLOAD & RLOAD |
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| SDAC_21 | DNL(4) | Differential Non Linearity | -1.4 | — | 1.4 | LSB | CTRLB.REFSEL = 0x1 VREF = VDDANA = 5.0V w/ CLOAD & RLOAD |
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| -1.5 | — | 1.5 | LSB | CTRLB.REFSEL = 0x2 VDDANA = 5.0V VREF = VREFA pin = 3.0V w/ CLOAD & RLOAD |
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| SDAC_23 | GERR (4) | Gain Error | -5.4 | — | 5.4 | LSB | CTRLB.REFSEL = 0x1 DAC reference = VDDANA = 5.0V w/ CLOAD & RLOAD |
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| -7.2 | — | 7.2 | LSB | CTRLB.REFSEL = 0x2 VDDANA = 5.0V DAC reference = VREFA pin = 3.0V w/ CLOAD & RLOAD |
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| SDAC_25 | EOFF (4) | Offset Error | -3.4 | — | 3.4 | LSB | CTRLB.REFSEL = 0x1 DAC reference = VDDANA = 5.0V w/ CLOAD & RLOAD |
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| -6.4 | — | 6.4 | LSB | CTRLB.REFSEL = 0x2 VDDANA = 5.0V DAC reference = VREFA pin = 3.0V w/ CLOAD & RLOAD |
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Note:
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