43.17 Digital-to-Analog Converter (DAC) Electrical Specifications

Table 43-20. Digital-to-Analog Converter (DAC) Electrical Specifications
AC CHARACTERISTICS				Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics		Min.	Typical	Max.	Units	Conditions
DAC_1	DRES	DAC Resolution		—	—	10	Bits	—
DAC_3	DCLK	Internal DAC Clock Frequency (GCLK_DAC)		—	—	48	MHz	VDDANA = 2.7V
DAC_5	DSAMP	DAC Sampling Rate		—	—	350	ksps	+/-4 LSB of final value for step size ≤100 LSb @ C_LOAD & R_LOAD w/VDDANA = 5.0V
DAC_7	VOUT	Output Voltage Range		GNDANA+0.05V	—	VDDANA-0.05V	V	Ext Pin (Buffered) VREFA = VDDANA @ C_LOAD & R_LOAD
				GNDANA+0.05V	—	VREF	V	Ext Pin (Buffered) @ C_LOAD & R_LOAD (VREFA < (VDDANA-50 mv))
				GNDANA	—	VREF	V	Internal connection to another module (for example, AC) (No buffer)
DAC_9	VREF ^(1,2)	DAC Reference Input Option^(1,2)	VDDANA CTRLB.REFSEL = 0x1	VDDANA			V	—
			VREFA pin CTRLB.REFSEL = 0x2	2.4V ^(1,2)	—	VDDANA - 0.6V	V	VDDANA ≥ VREF + 0.6V
			INTREF CTRLB.REFSEL = 0x0	2.4V^(1,2)	VR_1	VDDANA - 0.6V	V	See parameter VR_1
DAC_11	CLOAD	DAC Out max load to meet VOUT & TSET		—	—	100	pF	—
DAC_13	RLOAD	DAC Out max load to meet VOUT & TSET		5	—	—	kΩ	—
SINGLE ENDED MODE^(1,2,3)
SDAC_19	INL⁽⁴⁾	Integral Non Linearity		-1.2	—	1.2	LSB	CTRLB.REFSEL = 0x1 VREF = VDDANA = 5.0V w/ C_LOAD & R_LOAD
SDAC_19	INL⁽⁴⁾	Integral Non Linearity		-1.2	—	1.2	LSB	CTRLB.REFSEL = 0x2 VDDANA = 5.0V VREF = VREFA pin = 3.0V w/ C_LOAD & R_LOAD
SDAC_21	DNL⁽⁴⁾	Differential Non Linearity		-1.4	—	1.4	LSB	CTRLB.REFSEL = 0x1 VREF = VDDANA = 5.0V w/ C_LOAD & R_LOAD
SDAC_21	DNL⁽⁴⁾	Differential Non Linearity		-1.5	—	1.5	LSB	CTRLB.REFSEL = 0x2 VDDANA = 5.0V VREF = VREFA pin = 3.0V w/ C_LOAD & R_LOAD
SDAC_23	GERR ⁽⁴⁾	Gain Error		-5.4	—	5.4	LSB	CTRLB.REFSEL = 0x1 DAC reference = VDDANA = 5.0V w/ C_LOAD & R_LOAD
SDAC_23	GERR ⁽⁴⁾	Gain Error		-7.2	—	7.2	LSB	CTRLB.REFSEL = 0x2 VDDANA = 5.0V DAC reference = VREFA pin = 3.0V w/ C_LOAD & R_LOAD
SDAC_25	EOFF ⁽⁴⁾	Offset Error		-3.4	—	3.4	LSB	CTRLB.REFSEL = 0x1 DAC reference = VDDANA = 5.0V w/ C_LOAD & R_LOAD
SDAC_25	EOFF ⁽⁴⁾	Offset Error		-6.4	—	6.4	LSB	CTRLB.REFSEL = 0x2 VDDANA = 5.0V DAC reference = VREFA pin = 3.0V w/ C_LOAD & R_LOAD
Note: DAC Internal Bandgap Reference voltage 4.096V when used. DAC functional device operation with either internal or external VREF<2.4v is guaranteed, but not characterized. DAC will function, but with degraded performance. DAC accuracy is limited by users application noise/accuracy on VDDANA, GNDANA and VREF accuracy/drift. 10-bit mode. Over VOUT range defined by DAC_7 parameter.