43.10 Maximum Clock Frequencies Electrical Specifications
| AC CHARACTERISTICS | Standard
Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise
stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial |
|||
|---|---|---|---|---|
| Param. No. | Symbol | Characteristics | Max | Units |
| FCLK_1 | fCPU | CPU clock freq | 48 | MHz |
| FCLK_3 | fAHB | AHB clock freq | 48 | MHz |
| FCLK_5 | fAPBn | APBA, APBB, APBC clock freq | 48 | MHz |
| FCLK_6a | fGCLKGEN[0:2] | GCLK clock freq output | 96 | MHz |
| FCLK_6b | fGCLKGEN[3:8] | GCLK clock freq output | 66 | MHz |
| FCLK_7 | fGCLK_DPLLx | FDPLL96M reference clock freq | 2 | MHz |
| FCLK_9 | fGCLK_DPLLx_32K | FDPLL96M 32k reference clock freq | 33 | kHz |
| FCLK_11 | fGCLK_EIC | EIC input clock freq | 48 | MHz |
| FCLK_13 | fGCLK_FREQM_MSR | FREQM Measure | 96 | MHz |
| FCLK_15 | fGCLK_FREQM_REF | FREQM Reference | 48 | MHz |
| FCLK_17 | fGCLK_EVSYS_CHANNELx | EVSYS channel x input clock freq | 48 | MHz |
| FCLK_19 | fGCLK_SERCOMx_SLOW | Common SERCOM slow input clock freq | 5 | MHz |
| FCLK_21 | fGCLK_SERCOMx_CORE | SERCOMx input clock freq | 48 | MHz |
| FCLK_23 | fGCLK_TCC0/1 | TCC0/1 input clock freq | 96 | MHz |
| FCLK_25 | fGCLK_TCC2 | TCC2 input clock freq | 48 | MHz |
| FCLK_27 | fGCLK_TCx | TCx input clock freq | 48 | MHz |
| FCLK_29 | fGCLK_PDEC | PDEC input clock freq | 96 | MHz |
| FCLK_31 | fGCLK_CCL | CCL input clock freq | 48 | MHz |
| FCLK_33 | fGCLK_GCLKINx | External GCLKx input clock freq | 48 | MHz |
| FCLK_35 | fGCLK_AC | Analog comparator peripheral module clock freq | 48 | MHz |
| FCLK_37 | fGCLK_ADCx | ADCx input clock freq | 48 | MHz |
| FCLK_39 | fGCLK_SDADC | SDADC input clock freq | 48 | MHz |
| FCLK_41 | fGCLK_DAC | DAC input clock freq | 48 | MHz |