43.1 Operating Frequencies and Thermal Limitations

Table 43-2. Operating Frequency vs. Voltage
Param. No.VDDIO, VDDIN, VDDANA RangeTemp. Range (in °C)Max CPU FrequencyComments
DC_52.7 to 5.5V(1,2,3)-40°C to +85°C48 MhzIndustrial
Note:
  1. With BODVDD disabled.
  2. The same voltage must be applied to VDDIN and VDDANA. This common voltage is referred to as VDD in the data sheet. VDDIO should be lower or equal to VDD = VDDIN = VDDANA.
  3. Some I/Os are in the VDDIO cluster, but can be multiplexed as analog functions (inputs or outputs). In such a case, VDDANA is used to power the I/O. Using this configuration may result in an electrical conflict if the VDDIO voltage is lower than VDD = VDDIN = VDDANA.
Table 43-3. Thermal Operating Conditions
RatingSymbolMin.Typ.Max.Unit
Operating Ambient Temperature RangeTA-4085°C
Operating Junction Temperature RangeTJ(1)°C
Power Dissipation:

Internal Chip Power Dissipation:

PINT = (VDD x (IDD - Σ IOHVDD)) + VDDIO x (IDDIO - Σ IOHVDDIO)

I/O Pin Power Dissipation:

PI/O = Σ ({VDD - VOH} x IOHVDD) + Σ (VOL x IOLVDD) + Σ ({VDDIO - VOH} x IOHVDDIO) + Σ (VOL x IOLVDDIO)

PDPINT + PI/OW
Maximum Allowed Power DissipationPDMAX(TJ – TA)/θJAW
Note:
  1. See Absolute Maximum Ratings.
Table 43-4. Thermal Packaging Characteristics
CharacteristicsSymbolTyp.Max.UnitComments
Thermal Resistance, 32-pin TQFP (7x7x1 mm) PackageθJA63.1°C/WNote (1)
Thermal Resistance, 48-pin TQFP (7x7x1 mm) PackageθJA62.7°C/W
Thermal Resistance, 32-pin VQFN (5x5x0.9 mm) PackageθJA40.5°C/W
Thermal Resistance, 48-pin VQFN (7x7x0.9 mm) PackageθJA30.9°C/W
Note:
  1. Junction to ambient thermal resistance, Theta-JA (θJA) numbers are achieved by package simulations.