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9.2.11 NVM ECC Fault Injection Address Register
Table 9-12. Register Bit Attribute Legend Symbol Description Symbol Description Symbol Description R Readable
bit HC Cleared by
Hardware (Gray
cell) Unimplemented W Writable
bit HS Set by
Hardware X Bit is unknown
at Reset C Write to
clear S Software
settable bit x Channel
number
Name: NVMECCFADDR Offset: 0x3028
Bit 31 30 29 28 27 26 25 24 Access Reset
Bit 23 22 21 20 19 18 17 16 ADDR[23:16] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 ADDR[15:8] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 ADDR[7:4] Access R/W R/W R/W R/W Reset 0 0 0 0
Bits 23:16 – ADDR[23:16]
Bits 15:8 – ADDR[15:8]
Bits 7:4 – ADDR[7:4] ECC Fault Injection Address bits Address of targeted Flash word
for Fault injection
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