9.2.8 NVM ECC Control Register
Note:
- The LOCK bit is settable by software and can only be cleared via a Reset.
- If the ECCLOCK=
1, then the FLTINJ bit is a don’t care and the Fault injection function is disabled.
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Gray cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| C | Write to clear | S | Software settable bit | x | Channel number |
| Name: | NVMECCCON |
| Offset: | 0x301C |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ECCLOCK | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FLTINJ | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
Bit 11 – ECCLOCK ECC Fault Inject LOCK bit(1)
| Value | Description |
|---|---|
1 | ECC Fault injection function is disabled |
0 | ECC Fault injection functionality is enabled |
Bit 0 – FLTINJ Fault Injection Sequence Enable bit(2)
| Value | Description |
|---|---|
1 | Enable at Fault injection to occur on NVM address match with ECCFADR |
0 | Fault injection is disabled |
