10.11.2 Clock Divider Register

Note:
  1. The DOZE[2:0] bits can only be written to when the DOZEN bit is clear. If DOZEN = 1, any writes to DOZE[2:0] are ignored.
  2. This bit is cleared when the ROI bit is set and an interrupt occurs.
  3. The DOZEN bit cannot be set if DOZE[2:0] = 000. If DOZE[2:0] = 000, any attempt by user software to set the DOZEN bit is ignored.
  4. PLLPRE[3:0] may be updated while the PLL is operating, but the VCO may overshoot.

Legend: r = Reserved bit

Name: CLKDIV
Offset: 0xF86

Bit 15141312111098 
 ROIDOZE[2:0]DOZENFRCDIV[2:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00110000 
Bit 76543210 
   Reserved[1:0]PLLPRE[3:0] 
Access rrR/WR/WR/WR/W 
Reset 000001 

Bit 15 – ROI Recover on Interrupt bit

ValueDescription
1

Interrupts will clear the DOZEN bit and the processor clock, and the peripheral clock ratio is set to 1:1

0

Interrupts have no effect on the DOZEN bit

Bits 14:12 – DOZE[2:0]  Processor Clock Reduction Select bits(1)

ValueDescription
111

FP divided by 128

110

FP divided by 64

101

FP divided by 32

100

FP divided by 16

011

FP divided by 8 (default)

010

FP divided by 4

001

FP divided by 2

000

FP divided by 1

Bit 11 – DOZEN  Doze Mode Enable bit(2,3)

ValueDescription
1

DOZE[2:0] field specifies the ratio between the peripheral clocks and the processor clocks

0

Processor clock and peripheral clock ratio is forced to 1:1

Bits 10:8 – FRCDIV[2:0] Internal Fast RC Oscillator Postscaler bits

ValueDescription
111

FRC divided by 256

110

FRC divided by 64

101

FRC divided by 32

100

FRC divided by 16

011

FRC divided by 8

010

FRC divided by 4

001

FRC divided by 2

000

FRC divided by 1 (default)

Bits 5:4 – Reserved[1:0]  Read as ‘0

Bits 3:0 – PLLPRE[3:0]  PLL Phase Detector Input Divider Select bits(4)

(also denoted as ‘N1’, PLL prescaler)
ValueDescription
1111

Reserved

. . .
1001

Reserved

1000

Input divided by 8

0111

Input divided by 7

0110

Input divided by 6

0101

Input divided by 5

0100

Input divided by 4

0011

Input divided by 3

0010

Input divided by 2

0001

Input divided by 1 (power-on default selection)

0000

Reserved