11.6.4 Clock Output Control
| Name: | CLKOCTL |
| Address: | 0x0089 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | RO | RO | RO | RO | RO | RO | RO | RO | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | RO | RO | RO | RO | RO | RO | RO | RO | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | RO | RO | RO | RO | RO | RO | RO | RO | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLKOEN | CLKOSEL[1:0] | ||||||||
| Access | RO | RO | RO | R/W NASR | RO | RO | R/W NASR | R/W NASR | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | |
Bit 4 – CLKOEN Clock Output Enable
Setting this bit will enable the clock output to the CLKOUT pin.
Note: This bit is only reset by power-on. It is not affected by a
soft reset or assertion of the RESET_N pin.
| Value | Description |
|---|---|
0 |
Clock output to CLKOUT is disabled |
1 |
Clock output to CLKOUT is enabled |
Bits 1:0 – CLKOSEL[1:0] Clock Output Select
This field selects the clock for output onto the CLKOUT pin when enabled.
Note: This bit is only reset by power-on. It is not affected by a
soft reset or assertion of the RESET_N pin.
| Value | Description |
|---|---|
00 |
8.33 MHz |
01 |
12.5 MHz |
10 |
6.25 MHz |
11 |
Reserved |