47.6.22 QuiddiKey Test Register

Table 47-22. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: QK TEST
Offset: 0x2D8
Reset: 0x00000000
Property: R/W

Test register; With the Test register a BIST can be started. It also shows the result of the last BIST.

Bit 3130292827262524 
 QK ALLOW BIST        
Access R/W 
Reset 0 
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 QK BIST ERRORQK BIST OKQK BIST ACTIVEQK BIST RUNNING   QK BIST ENABLE 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bit 31 – QK ALLOW BIST QuiddiKey Allow BIST

BIST is not allowed

Bit 7 – QK BIST ERROR QuiddiKey BIST Error

BIST has failed

Bit 6 – QK BIST OK QuiddiKey BIST OK

BIST has passed.

Bit 5 – QK BIST ACTIVE QuiddiKey BIST Active

BIST is in progress.

Bit 4 – QK BIST RUNNING QuiddiKey BIST Running

BIST is in progress or finishing up (after qk_bist_enable = 0).

Bit 0 – QK BIST ENABLE QuiddiKey BIST Enable

Isolates QuiddiKey and runs BIST.