47.6.24 QuiddiKey Module Restrict User Context 0 Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | QK HW RUC0 |
| Offset: | 0x2E0 |
| Reset: | 0x00000000 |
| Property: | R |
The Module Restrict User Context 0 register shows the values of the qk_restrict_user_context_0 signal on the signal interface.
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| QK RESTRICT USER CONTEXT 0[31:24] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| QK RESTRICT USER CONTEXT 0[23:16] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| QK RESTRICT USER CONTEXT 0[15:8] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| QK RESTRICT USER CONTEXT 0[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 31:0 – QK RESTRICT USER CONTEXT 0[31:0] QuiddiKey Restrict User Context 0
For each bit in the User Context 0 field:
| Value | Description |
|---|---|
| 0x0 | This bit can be used. |
| 0x1 | This bit cannot be used. |