47.6.3 Disable Function Control Register

Table 47-3. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Name:	DISABLE
Offset:	0x100
Reset:	0x00000000
Property:	R/W


Bit	31	30	29	28	27	26	25	24
	TEST PUF	TEST MEM	SKIP MEM TEST
Access	R/W	R/W	R/W
Reset	0	0	0


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
	GEN RAND						WRAP	WRAP GEN RAND
Access	R/W						R/W	R/W
Reset	0						0	0


Bit	7	6	5	4	3	2	1	0
	UNWRAP	GET KEY	STOP		RECONSTRUCT	START	ENROLL
Access	R/W	R/W	R/W		R/W	R/W	R/W
Reset	0	0	0		0	0	0

Bit 31 – TEST PUF TEST PUF Command Disable bit

Bit 30 – TEST MEM TEST MEMORY Command Disable bit

Bit 29 – SKIP MEM TEST SKIP MEMORY TEST Command Control bit

Bit 15 – GEN RAND GENERATE RANDOM Command Disable bit

Bit 9 – WRAP WRAP Command Disable bit

Bit 8 – WRAP GEN RAND WRAP GENERATE RANDOM Command Disable bit

Bit 7 – UNWRAP UNWRAP Command Disable bit

Bit 6 – GET KEY GET KEY Command Disable bit

Bit 5 – STOP STOP Command Disable bit

Bit 3 – RECONSTRUCT RECONSTRUCT Command Disable bit

Bit 2 – START START Command Disable bit

Bit 1 – ENROLL ENROLL Command Disable bit

DS60001921A

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