47.6.18 Data Input register
Register
Table 47-18. Register Bit Attribute Legend| Symbol | Description | Symbol | Description | Symbol | Description |
|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | QK DIR |
| Offset: | 0x2A0 |
| Reset: | 0x00000000 |
| Property: | W |
The Data Input
register is used to transfer data to QuiddiKey. It can only be written when input data
is requested (indicated by the qk_di_request signal). When written at any other moment,
or when read, an error response is generated. Depending on the way the system is
configured and connected, this may generate an exception.
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| | QK DI[31:24] | |
| Access | W | W | W | W | W | W | W | W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| | QK DI[23:16] | |
| Access | W | W | W | W | W | W | W | W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| | QK DI[15:8] | |
| Access | W | W | W | W | W | W | W | W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | QK DI[7:0] | |
| Access | W | W | W | W | W | W | W | W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 31:0 – QK DI[31:0] QuiddiKey Data
Input
