47.6.20 QuiddiKey Miscellaneous Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | QK MISC |
| Offset: | 0x2C0 |
| Reset: | 0x00000001 |
| Property: | R/W |
The Miscellaneous register defines miscellaneous settings for QuiddiKey. These usually need to be configured only once after power up orreset.
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| QK DATA ENDIANESS | |||||||||
| Access | R/W | ||||||||
| Reset | 1 |
Bit 0 – QK DATA ENDIANESS QuiddiKey Data Endianess
Defines the endianness of data in QK_DIR and QK_DOR.
| Value | Description |
|---|---|
| 0x0 | Little endian. |
| 0x1 | Big endian (default). |