16.4.6 Master Period Register

Note: If HREN = 0, the four least significant bits are read as ‘0000’.
Name: MPER
Offset: 0x1014

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
     MPER[19:0] 
Access R/WR/WR/WR/W 
Reset 0000 
Bit 15141312111098 
 MPER[19:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 MPER[19:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 19:0 – MPER[19:0] Master Period Register bits

This register holds the period value that can be shared by multiple PWM Generators.
Note: Period values less than 0x0100 should not be used.