55.40 SDHC Electrical Specifications

Figure 55-28. SD/SDIO/MMC SDHC Module Timing Diagram
Table 55-55. SD Host Controller Timing Specifications (1)
AC CHARACTERISTICS Standard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial Temperature
Param. No. Symbol Characteristics Min. Typ. Max. Units Conditions
SD_1 fGCLK_SDHCx_SLOW Common SDHC slow input clock frequency — — 12 MHz —
SD_3 fGCLK_SDHCx_CORE SDHCx input clock frequency — — 150 MHz —
SD/SDIO Default Speed Mode
SD_5 tSDCK Clock Frequency — — 25 MHz —
SD_7 tDUTY Duty Cycle — 50 — % —
SD_9 tHIGH Clock High Time 17.41 — — ns —
SD_11 tLOW Clock Low Time 17.46 — — ns —
SD_13 tRISE Clock Rise Time DI_25 ns DI_25: Refer to I/O Pin Electrical Specifications
SD_15 tFALL Clock Fall Time DI_27 ns DI_27: Refer to I/O Pin Electrical Specifications
SD_17 tIN_SETUP Input Setup Time 6 — — ns —
SD_19 tIN_HOLD Input Hold Time 1 — — ns —
SD_21 tOUT_DLY Output Delay Time — — 6 ns VDD=3.3V, CLOAD OUT=20pF
SD_23 tOUT_SETUP Output HOLD Time 3 — — ns
SD/SDIO High Speed Mode
SD_25 tSDCK Clock Frequency — — 50 MHz —
SD_27 tDUTY Duty Cycle — 50 — % —
SD_29 tHIGH Clock High Time 7.87 — — ns —
SD_31 tLOW Clock Low Time 8.05 — — ns —
SD_29 tRISE Clock Rise Time DI_25 ns DI_25: Refer to I/O Pin Electrical Specifications
SD_31 tFALL Clock Fall Time DI_27 ns DI_27: Refer to I/O Pin Electrical Specifications
SD_33 tIN_SETUP Input Setup Time 6 — — ns —
SD_35 tIN_HOLD Input Hold Time 1 — — ns —
SD_37 tOUT_DLY Output Delay Time — — 6 ns VDD=3.3V, CLOAD OUT=20pF
SD_39 tOUT_SETUP Output HOLD Time 3 — — ns
MMC Default Speed Mode
SD_41 tSDCK Clock Frequency — — 26 MHz —
SD_43 tDUTY Duty Cycle — 50 — % —
SD_45 tHIGH Clock High Time 17.41 — — ns —
SD_47 tLOW Clock Low Time 17.46 — — ns —
SD_49 tRISE Clock Rise Time DI_25 ns DI_25: Refer to I/O Pin Electrical Specifications
SD_51 tFALL Clock Fall Time DI_27 ns DI_27: Refer to I/O Pin Electrical Specifications
SD_53 tIN_SETUP Input Setup Time 6 — — ns —
SD_55 tIN_HOLD Input Hold Time 8.3 — — ns —
SD_57 tOUT_DLY Output Delay Time — — 6 ns VDD=3.3V, CLOAD OUT=20pF
SD_59 tOUT_SETUP Output HOLD Time 3 — — ns
Note:
  1. All output pins with 20pF load.