55.40 SDHC Electrical Specifications

Figure 55-28. SD/SDIO/MMC SDHC Module Timing Diagram
Table 55-55. SD Host Controller Timing Specifications (1)
AC CHARACTERISTICSStandard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial Temperature

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
SD_1fGCLK_SDHCx_SLOWCommon SDHC slow input clock frequency——12MHz—
SD_3fGCLK_SDHCx_CORESDHCx input clock frequency——150MHz—
SD/SDIO Default Speed Mode
SD_5tSDCKClock Frequency——25MHz—
SD_7tDUTYDuty Cycle—50—%—
SD_9tHIGHClock High Time17.41——ns—
SD_11tLOWClock Low Time17.46——ns—
SD_13tRISEClock Rise TimeDI_25nsDI_25: Refer to I/O Pin Electrical Specifications
SD_15tFALLClock Fall TimeDI_27nsDI_27: Refer to I/O Pin Electrical Specifications
SD_17tIN_SETUPInput Setup Time6——ns—
SD_19tIN_HOLDInput Hold Time1——ns—
SD_21tOUT_DLYOutput Delay Time——6nsVDD=3.3V, CLOAD OUT=20pF
SD_23tOUT_SETUPOutput HOLD Time3——ns
SD/SDIO High Speed Mode
SD_25tSDCKClock Frequency——50MHz—
SD_27tDUTYDuty Cycle—50—%—
SD_29tHIGHClock High Time7.87——ns—
SD_31tLOWClock Low Time8.05——ns—
SD_29tRISEClock Rise TimeDI_25nsDI_25: Refer to I/O Pin Electrical Specifications
SD_31tFALLClock Fall TimeDI_27nsDI_27: Refer to I/O Pin Electrical Specifications
SD_33tIN_SETUPInput Setup Time6——ns—
SD_35tIN_HOLDInput Hold Time1——ns—
SD_37tOUT_DLYOutput Delay Time——6nsVDD=3.3V, CLOAD OUT=20pF
SD_39tOUT_SETUPOutput HOLD Time3——ns
MMC Default Speed Mode
SD_41tSDCKClock Frequency——26MHz—
SD_43tDUTYDuty Cycle—50—%—
SD_45tHIGHClock High Time17.41——ns—
SD_47tLOWClock Low Time17.46——ns—
SD_49tRISEClock Rise TimeDI_25nsDI_25: Refer to I/O Pin Electrical Specifications
SD_51tFALLClock Fall Time DI_27nsDI_27: Refer to I/O Pin Electrical Specifications
SD_53tIN_SETUPInput Setup Time6——ns—
SD_55tIN_HOLDInput Hold Time8.3——ns—
SD_57tOUT_DLYOutput Delay Time——6nsVDD=3.3V, CLOAD OUT=20pF
SD_59tOUT_SETUPOutput HOLD Time3——ns
Note:
  1. All output pins with 20pF load.