55.26 I2S Electrical Specifications

Figure 55-5. I2S Host Mode Timing Diagram
Table 55-35. I2S Host Mode Electrical Specifications
AC CHARACTERISTICS Standard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial Temperature

Param. No. Symbol Characteristics Min. Typ. Max. Units Conditions
I2S_1 fM_MCK Host MCK Frequency 12.5 MHz VDD = 1.8V or VDD(min.) whichever is greater,

CLOAD= 20 pF(max.)

12.5 VDD = 3.3V,

CLOAD= 20 pF(max.)

I2S_3 tMCKL MCK Output Low Time 1/(2*fM_MCK ) ns
I2S_5 tMCKH MCK Output High Time 1/(2*fM_MCK ) ns
I2S_7 tMCKR MCK Rise Time DI_25 ns DI_25: Refer to I/O Pin Electrical Specifications
I2S_9 tMCKF MCK Fall Time DI_27 ns DI_27: Refer to I/O Pin Electrical Specifications
I2S_11 fM_SCK Host SCK Frequency 10.29 MHz VDD = 1.8V or VDD(min.) whichever is greater,

CLOAD= 20 pF(max.)

11.4 VDD = 3.3V,

CLOAD= 20 pF(max.)

I2S_13 tSCKL SCK Output Low Time 1/(2*fM_SCK) ns
I2S_15 tSCKH SCK Output High Time 1/(2*fM_SCK) ns
I2S_17 tSCKR SCK Rise Time DI_25 ns DI_25: Refer to I/O Pin Electrical Specifications
I2S_19 tSCKF SCK Fall Time DI_27 ns DI_27: Refer to I/O Pin Electrical Specifications
I2S_21 tM_FSVALID Host Frame Sync Valid 5.3 ns VDD = 1.8V or VDD(min.) whichever is greater,

CLOAD= 20 pF(max.)

4.2 ns VDD = 3.3V,

CLOAD = 20 pF(max)

I2S_23 tM_FSHOLD Host Frame Sync Hold 0 ns VDD = 1.8V or VDD(min.) whichever is greater,

CLOAD= 20 pF(max.)

0 ns VDD = 3.3V,

CLOAD= 20 pF(max.)

I2S_25 tM_DISETUP Host Data Input Setup 16.4 ns VDD = 1.8V or VDD(min.) whichever is greater,

CLOAD= 20 pF(max.)

11.9 ns VDD = 3.3V,

CLOAD= 20 pF(max.)

I2S_27 tM_DIHOLD Host Data Input Hold 3.4 ns VDD = 1.8V or VDD(min.) whichever is greater,

CLOAD= 20 pF(max.)

3.4 ns VDD = 3.3V,

CLOAD= 20 pF(max.)

I2S_29 tM_DOVALID Host Data Output Valid 3.7 ns VDD = 1.8V or VDD(min.) whichever is greater,

CLOAD= 20 pF(max.)

3 ns VDD = 3.3V,

CLOAD= 20 pF(max.)

I2S_31 tM_DOHOLD Host Data Output Hold 0 ns VDD = 1.8V or VDD(min.) whichever is greater,

CLOAD= 20 pF(max.)

0 ns VDD = 3.3V,

CLOAD= 20 pF(max.)

I2S_33 fGCLK_I2S I2S Max GLK Input Clock Freq FCLK_29 MHz FCLK_29: Refer to Maximum Clock Frequencies Electrical Specifications
Figure 55-6. I2S Client Mode Timing Diagram
Table 55-36. I2S Client Mode Electrical Specifications
AC CHARACTERISTICS Standard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial Temperature

Param. No. Symbol Characteristics Min. Typ. Max. Units Conditions
I2S_41 fS_SCK SCK Client Frequency 15.48 MHz VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

15.83 VDD=3.3V,

CLOAD=20pF(MAX)

I2S_43 tS_FSVALID Frame Sync Valid 4.1 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

3.8 ns VDD=3.3V,

CLOAD=20pF(MAX)

I2S_45 tS_FSHOLD Frame Sync Hold 0 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

0 ns VDD=3.3V,

CLOAD=20pF(MAX)

I2S_47 tS_DISSETUP Data Input Client Setup 2.8 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

2.1 ns VDD=3.3V,

CLOAD=20pF(MAX)

I2S_49 tS_DISHOLD Data Input Client Hold 0 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

0 ns VDD=3.3V,

CLOAD=20pF(MAX)

I2S_51 tS_DSOVALID Data Output Client Valid 16.9 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

12.3 ns VDD=3.3V,

CLOAD=20pF(MAX)

I2S_53 tS_DSOHOLD Data Output Client Hold 5.3 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

4.1 ns VDD=3.3V,

CLOAD=20pF(MAX)

Figure 55-7. I2S PDM2 Mode Timing Diagram
Table 55-37. I2S PMD2 Mode Electrical Specifications
AC CHARACTERISTICS Standard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial Temperature

Param. No. Symbol Characteristics Min. Typ. Max. Units Conditions
I2S_55 tSCK SCK Frequency 41.9 MHz VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

44.5 VDD=3.3V,

CLOAD=20pF(MAX)

I2S_57 tPDM2LS PDM Left Channel Setup 16.4 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

11.9 ns VDD=3.3V,

CLOAD=20pF(MAX)

I2S_59 tPDM2LH PDM Left Channel Hold 3.4 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

3.4 ns VDD=3.3V,

CLOAD=20pF(MAX)

I2S_61 tPDM2RS PDM Right Channel Setup 15.6 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

11.8 ns VDD=3.3V,

CLOAD=20pF(MAX)

I2S_63 tPDM2RH PDM Right Channel Hold 4.4 ns VDD=1.8V or VDD(min) whichever is greater,

CLOAD=20pF(MAX)

3.4 ns VDD=3.3V,

CLOAD=20pF(MAX)