55.36 GMAC Electrical Specifications

Figure 55-22. MII Ethernet Module Output Timing Diagram (Media-Independent Interface)
Figure 55-23. MII Receive Ethernet Module Timing Diagram (Media-Independent Interface)
Figure 55-24. MII Transmit Ethernet Module Timing Diagram (Media-Independent Interface)
Table 55-50. MII RX/TX Ethernet Module Electrical Specifications
AC CHARACTERISTICSStandard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial Temperature

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
MII Output AC TIMING Requirements
ET_1tMDIOSUMDIO Set-up Time10——nsVDD = 3.3V with CLOAD = 20 pF
ET_3tMDIOHOLDMDIO Hold Time10——ns
ET_5tMDIOVALMDIO OUTPUT Valid Time0—10ns
MII RX AC TIMING Requirements
ET_7tRXCLKRXCLK Period—Note (1)—nsVDD = 3.3V with CLOAD = 20 pF
ET_9tRXCLKHRXCLK High TimetRXCLK / 2——ns
ET_11tRXCLKLRXCLK Low TimetRXCLK / 2——ns
ET_13tRXSU tRXERSU tRXDVSUERX[3:0], ERXER and ERXDV Set-up Time10——ns
ET_15tRXHOLD tRXERHOLD tRXDVHOLDERX[3:0], ERXER and ERXDV Hold Time10——ns
MII TX AC TIMING Requirements
ET_17tTXCLKTXCLK Period—Note (1)—nsVDD = 3.3V with CLOAD = 20 pF
ET_19tTXCLKHTXCLK High TimetTXCLK / 2——ns
ET_21tTXCLKLTXCLK Low TimetTXCLK / 2——ns
ET_23tTXCOLSU tTXCRSSUTXCOL and TXCRS Set-up Time10——ns
ET_25tTXCOLHOLD tTXCRSHOLDTXCOL and TXCRS Hold Time10——ns
ET_27tTX[3:0]VAL tTXERVAL tTXENVALTX[3:0], TXER and TXEN valid times10—25ns—
Note:
  1. 40 ns, (i.e., 25 MHz), for 100 BASE-TX operation, 400 ns, (i.e., 2.5 MHz), for 10 BASE-T operation. Clock source ppm ≤ 50.
Figure 55-25. RMII Ethernet Module Timing Diagram (Reduced Media-Independent Interface)
Table 55-51. RMII Ethernet Module Electrical Specifications (Reduced Media-Independent Interface)
AC CHARACTERISTICSStandard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial Temperature

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
ET_29tREFCLKReference Clock Frequency—20—nsVDD = 3.3V with CLOAD = 20 pF
ET_31tREFCLKIHReference Clock High Time—tREFCLK / 2—ns
ET_33tREFCLKILReference Clock Low Time—tREFCLK / 2—ns
ET_35REFCLKDCReference Clock Duty Cycle—50—%
ET_41tRX[1:0]SU tRXERSURXD[1:0], RXER Set-up time4——ns
ET_43tRX[1:0]HOLD tRXERHOLDRXD[1:0], RXER hold time2——ns
ET_45tTX[1:0]VAL tTXENVALTX[1:0], TXEN valid time2—16ns