18.4.14 Timer 64 Raw Interrupt Status Register

Table 18-18. TIM64_RIS
Bit NumberNameR/WReset ValueDescription
31:1ReservedR/W0Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation.
0TIM64_RISR/W0Raw interrupt status (RIS) for 64-bit Timer mode.

0: Timer 64 has not reached zero

1: Timer 64 has reached zero at least once since this bit was last cleared (by a reset or by writing 1 to this bit).

Writing 1 to this bit clears the bit and the interrupt; writing a zero has no effect.