2.7.2.9 System Handler Control and State Register

The SHCSR enables the system handlers, and indicates:

  • the pending status of the BusFault, MemManage fault, and SVC exceptions
  • the active status of the system handlers.

See the register summary in Table 2-44 for the SHCSR attributes. The bit assignments are:

Figure 2-36. SHCSR Bit Assignments
Table 2-57. SHCSR Bit Assignments
Bits Name Function
[31:19] — Reserved
[18] USGFAULTENA UsageFault enable bit, set to 1 to enable1
[17] BUSFAULTENA BusFault enable bit, set to 1 to enable a
[16] MEMFAULTENA MemManage enable bit, set to 1 to enable a
[15] SVCALLPENDED SVCall pending bit, reads as 1 if exception is pending2 
[14] BUSFAULTPENDED BusFault exception pending bit, reads as 1 if exception is pending b
[13] MEMFAULTPENDED MemManage fault exception pending bit, reads as 1 if exception is pending b
[12] USGFAULTPENDED UsageFault exception pending bit, reads as 1 if exception is pending b
[11] SYSTICKACT SysTick exception active bit, reads as 1 if exception is active3
[10] PENDSVACT PendSV exception active bit, reads as 1 if exception is active
[9] — Reserved
[8] MONITORACT Debug monitor active bit, reads as 1 if Debug monitor is active
[7] SVCALLACT SVCall active bit, reads as 1 if SVC call is active
[6:4] — Reserved
[3] USGFAULTACT UsageFault exception active bit, reads as 1 if exception is active
[2] — Reserved
[1] BUSFAULTACT BusFault exception active bit, reads as 1 if exception is active
[0] MEMFAULTACT MemManage exception active bit, reads as 1 if exception is active
Note:
  1. Enable bits, set to 1 to enable the exception, or set to 0 to disable the exception.
  2. Pending bits, read as 1 if the exception is pending, or as 0 if it is not pending. You can write to these bits to change the pending status of the exceptions.
  3. Active bits, read as 1 if the exception is active, or as 0 if it is not active. You can write to these bits to change the active status of the exceptions, but see the Caution in this section.

If you disable a system handler and the corresponding fault occurs, the processor treats the fault as a HardFault.

You can write to this register to change the pending or active status of system exceptions. An OS kernel can write to the active bits to perform a context switch that changes the current exception type.

  • Software that changes the value of an active bit in this register without correct adjustment to the stacked content can cause the processor to generate a fault exception. Ensure software that writes to this register retains and subsequently restores the current active status.
  • After you have enabled the system handlers, if you have to change the value of a bit in this register you must use a read-modify-write procedure to ensure that you change only the required bit.