2.7.2.4 Vector Table Offset Register

The VTOR indicates the offset of the vector table base address from memory address 0x00000000. For its attributes, see the register summary in Table 2-44.

The bit assignments are:

Figure 2-29. VTOR Bit Assignments
Table 2-48. VTOR Bit Assignments
Bits Name Function
[31:30] Reserved.
[29:7] TBLOFF Vector table base offset field. It contains bits[29:7] of the offset of the table base from the bottom of the memory map.

Bit [29] determines whether the vector table is in the code or SRAM memory region:

0: Code

1: SRAM.

Bit [29] is sometimes called the TBLBASE bit.
[6:0] Reserved.

When setting TBLOFF, you must align the offset to the number of exception entries in the vector table. <Configure the next statement to give the information required for your implementation, the statement reminds you of how to determine the alignment requirement.> The minimum alignment is 32 words, enough for up to 16 interrupts. For more interrupts, adjust the alignment by rounding up to the next power of two. For example, if you require 21 interrupts, the alignment must be on a 64-word boundary because the required table size is 37 words, and the next power of two is 64.

Table alignment requirements mean that bits [6:0] of the table offset are always zero.