7.4.1.22 HPDMA Interrupt Clear Register
Bit Number | Name | Reset Value | Description |
---|---|---|---|
0 | HPDMAICR_CLR_XFR_INT[0] | 0 | When this bit is set, HPDMA clears the following register bits: Descriptor 0 Status register HPDMASR_DCP_CMPLET[0] HPDMASR_DCP_DERR[0] HPDMASR_DCP_SERR[0] HPDMA Empty Descriptor register HPDMAEDR_DCP_NON_WORD_ERR[0] |
1 | HPDMAICR_CLR_XFR_INT[1] | 0 | When this bit is set, HPDMA clears the following register bits: Descriptor 1 Status register HPDMASR_DCP_CMPLET[1] HPDMASR_DCP_DERR[1] HPDMASR_DCP_SERR[1] HPDMA Empty Descriptor register HPDMAEDR_DCP_NON_WORD_ERR[1] |
2 | HPDMAICR_CLR_XFR_INT[2] | 0 | When this bit is set, HPDMA clears the following register bits: Descriptor 2 Status register HPDMASR_DCP_CMPLET[2] HPDMASR_DCP_DERR[2] HPDMASR_DCP_SERR[2] HPDMA Empty Descriptor register HPDMAEDR_DCP_NON_WORD_ERR[2] |
3 | HPDMAICR_CLR_XFR_INT[3] | 0 | When this bit is set, HPDMA clears the following register bits: Descriptor 3 Status register HPDMASR_DCP_CMPLET[3] HPDMASR_DCP_DERR[3] HPDMASR_DCP_SERR[3] HPDMA Empty Descriptor register HPDMAEDR_DCP_NON_WORD_ERR[3] |
4 | HPDMAICR_NON_WORD_INT[0] | 0 | When this bit is set, HPDMA clears the HPDMAEDR_DCP_NON_WORD_ERR[0] bit in the Empty Descriptor register. These bits always read back as 0. |
5 | HPDMAICR_NON_WORD_INT[1] | 0 | When this bit is set, HPDMA clears the HPDMAEDR_DCP_NON_WORD_ERR[1] bit in the Empty Descriptor Register. These bits always read back as 0. |
6 | HPDMAICR_NON_WORD_INT[2] | 0 | When this bit is set, HPDMA clears the HPDMAEDR_DCP_NON_WORD_ERR[2] bit in the Empty Descriptor register. These bits always read back as 0. |
7 | HPDMAICR_NON_WORD_INT[3] | 0 | When this bit is set, HPDMA clears the HPDMAEDR_DCP_NON_WORD_ERR[3] bit in the Empty Descriptor register. These bits always read back as 0. |
31:8 | Reserved | 0 | Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation. |