13.6.16 PWM Generator x I/O Control Register High
- A capture may be initiated in
software at any time by writing a ‘
1’ to CAP (PGxSTAT[5]).
| Name: | PGxIOCONH |
| Offset: | 0x332, 0x368, 0x39E, 0x3D4, 0x440, 0x4AC |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CAPSRC[2:0] | DTCMPSEL | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PMOD[1:0] | PENH | PENL | POLH | POLL | |||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 14:12 – CAPSRC[2:0] Time Base Capture Source Selection bits(1)
| Value | Description |
|---|---|
111 |
Reserved |
110 |
Reserved |
101 |
Reserved |
100 |
Capture time base value at assertion of selected PCI Fault signal |
011 |
Capture time base value at assertion of selected PCI current limit signal |
010 |
Capture time base value at assertion of selected PCI feed-forward signal |
001 |
Capture time base value at assertion of selected PCI Sync signal |
000 |
No hardware source selected for time base capture – software only |
Bit 8 – DTCMPSEL Dead-Time Compensation Select bit
| Value | Description |
|---|---|
1 |
Dead-time compensation is controlled by PCI feed-forward limit logic |
0 |
Dead-time compensation is controlled by PCI Sync logic |
Bits 5:4 – PMOD[1:0] PWM Generator Output Mode Selection bits
| Value | Description |
|---|---|
11 |
Reserved |
10 |
PWM Generator outputs operate in Push-Pull mode |
01 |
PWM Generator outputs operate in Independent mode |
00 |
PWM Generator outputs operate in Complementary mode |
Bit 3 – PENH PWMxH Output Port Enable bit
| Value | Description |
|---|---|
1 |
PWM Generator controls the PWMxH output pin |
0 |
PWM Generator does not control the PWMxH output pin |
Bit 2 – PENL PWMxL Output Port Enable bit
| Value | Description |
|---|---|
1 |
PWM Generator controls the PWMxL output pin |
0 |
PWM Generator does not control the PWMxL output pin |
Bit 1 – POLH PWMxH Output Polarity bit
| Value | Description |
|---|---|
1 |
Output pin is active-low |
0 |
Output pin is active-high |
Bit 0 – POLL PWMxL Output Polarity bit
| Value | Description |
|---|---|
1 |
Output pin is active-low |
0 |
Output pin is active-high |