13.3.31 ADC Digital Comparator x Control Register (x = 0, 1, 2, 3)
Legend: HC = Hardware Clearable bit; HS = Hardware Settable bit; HSC = Hardware Settable/Clearable bit
| Name: | ADCMPxCON |
| Offset: | 0xBA0, 0xBA4, 0xBA8, 0xBAC |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CHNL[4:0] | |||||||||
| Access | HSC/R | HSC/R | HSC/R | HSC/R | HSC/R | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CMPEN | IE | STAT | BTWN | HIHI | HILO | LOHI | LOLO | ||
| Access | R/W | R/W | HS/HC/R | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 12:8 – CHNL[4:0] Input Channel Number bits
| Value | Description |
|---|---|
11111 |
Reserved |
| . . . | |
10101 |
Band gap, 1.2V (AN21) |
10100 |
Temperature sensor (AN20) |
10011 |
AN19 |
10010 |
AN18 |
10001 |
AN17 |
10000 |
AN16 |
01111 |
AN15 |
| . . . | |
00000 |
AN0 |
Bit 7 – CMPEN Comparator Enable bit
| Value | Description |
|---|---|
1 |
Comparator is enabled. |
0 |
Comparator is disabled and the STAT status bit is cleared. |
Bit 6 – IE Comparator Common ADC Interrupt Enable bit
| Value | Description |
|---|---|
1 |
ADC interrupt will be generated if the comparator detects a comparison event. |
0 |
ADC interrupt will not be generated for the comparator. |
Bit 5 – STAT Comparator Event Status bit
This bit is cleared by hardware when the channel number is read from the CHNL[4:0] bits.
| Value | Description |
|---|---|
1 |
A comparison event has been detected since the last read of the CHNL[4:0] bits. |
0 |
A comparison event has not been detected since the last read of the CHNL[4:0] bits. |
Bit 4 – BTWN Between Low/High Comparator Event bit
| Value | Description |
|---|---|
1 |
Generates a comparator event when ADCMPxLO ≤ ADCBUFx < ADCMPxHI. |
0 |
Does not generate a digital comparator event when ADCMPxLO ≤ ADCBUFx < ADCMPxHI. |
Bit 3 – HIHI High/High Comparator Event bit
| Value | Description |
|---|---|
1 |
Generates a digital comparator event when ADCBUFx ≥ ADCMPxHI. |
0 |
Does not generate a digital comparator event when ADCBUFx ≥ ADCMPxHI. |
Bit 2 – HILO High/Low Comparator Event bit
| Value | Description |
|---|---|
1 |
Generates a digital comparator event when ADCBUFx < ADCMPxHI. |
0 |
Does not generate a digital comparator event when ADCBUFx < ADCMPxHI. |
Bit 1 – LOHI Low/High Comparator Event bit
| Value | Description |
|---|---|
1 |
Generates a digital comparator event when ADCBUFx ≥ ADCMPxLO. |
0 |
Does not generate a digital comparator event when ADCBUFx ≥ ADCMPxLO. |
Bit 0 – LOLO Low/Low Comparator Event bit
| Value | Description |
|---|---|
1 |
Generates a digital comparator event when ADCBUFx < ADCMPxLO. |
0 |
Does not generate a digital comparator event when ADCBUFx < ADCMPxLO. |