Legend: HC = Bit is Cleared by Hardware; HS = Bit is Set by Hardware; R =
Readable Bit; W = Writable Bit; U = Unimplemented Bit, read as '0';
-n = Value at POR; '1' = Bit is set; '0' = Bit is
cleared; x = Bit value is unknown
Name:
ITCHIT
Offset:
0x398
Bit
31
30
29
28
27
26
25
24
HIT[31:24]
Access
HS
R/W
X
X
X
X
X
X
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
HIT[23:16]
Access
X
X
X
X
X
X
X
X
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
HIT[15:8]
Access
X
X
X
X
X
X
X
X
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
HIT[7:0]
Access
X
X
X
X
X
X
X
X
Reset
0
0
0
0
0
0
0
0
Bits 31:0 – HIT[31:0] Record x Comparator Event Flag
bits
These bits are set
when ITC record data meets comparison criteria and cleared when a
'0' is written to these bits by software.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
