9.3.14.7 LPM_INTR_REG (Host) Bit Definitions

Table 9-121. LPM_INTR_REG (0x40043364) (Host Mode)
Bit Number Name Reset Value Function
[7:6] Reserved N/A
5 LPMERR 0 This bit is set if a response to the LPM transaction is received with a bit stuff error or a PID error. In this case, suspend does not occur and the state of the device is unknown.
4 LPMRES 0 This bit is set when the USB controller has been resumed for any reason. This bit is mutually exclusive from RESUME (POWER_REG.bit2).
3 LPMNC 0 This bit is set when an LPM transaction has been transmitted and has failed to complete. The transaction would have failed either because a timeout is occurred or there are bit errors in the response for three attempts.
2 LPMACK 0 This bit is set when an LPM transaction is transmitted and the device responds with an ACK.
1 LPMNY 0 This bit is set when an LPM transaction is transmitted and the device responds with a NYET.
0 LPMST 0 This bit is set when an LPM transaction is transmitted and the device responds with a STALL.