9.3.11.5 C_T_HHRSTN_REG Bit Definitions

Table 9-100. C_T_HHSRTN_REG (0x40043346)
Bit Number	Name	Reset Value	Function
[15:0]	C_T_HHRSTN	N/A	The delay from the end of high-speed resumes signaling to enable UTM normal operating mode. The default value is 2F3h if the host PHY data width is 16 bits (XCLK is 30 MHz) and 5E6h if the PHY data width is 8 bits (XCLK is 60 MHz), corresponding to a delay of 100 µs.

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