9.3.11.4 C_T_UCH_REG Bit Definitions

Table 9-99. C_T_UCH_REG (0x40043344)
Bit NumberNameReset ValueFunction
[15:0]C_T_UCHN/AConfigurable Chirp Timeout timer. The default value is 203Ah if the host PHY data width is 16 bits (XCLK is 30 MHz) and 4074h if the PHY data width is 8 bits (XCLK is 60 MHz), corresponding to a delay of 1.1 ms.