13.4.3.8 SPI Slave Select Register

The following table describes the register that specifies the slave that has been selected.

Table 13-17. SLAVE_SELECT
Bit Number Name R/W Reset Value Description
[31:8] Reserved R/W 0 Software must not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit must be preserved across a read-modify-write operation.
7:0 SLAVE SELECT R/W 0 Specifies the slave selected. Writing one to a bit position selects the corresponding slave.

SLAVESELECT[7:1] are available at the FPGA fabric interface, while SLAVESELECT[0] is available at the SPI_X_SS[0] pin.

The slave select output polarity is active-low. In TI mode, the slave select output is inverted to become active-high.