13.4.3.13 SPI Packet Size Register
The following table provides the details of the Packet Size registers that are used to set the SPI CMD/data frame size.
Bit Number | Name | R/W | Reset Value | Description |
---|---|---|---|---|
[31:8] | Reserved | R/W | 0 | Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation. |
[7:0] | PKTSIZE | R/W | 0 | Sets the size of the SPI CMD/data frame. PKTSIZE cannot be greater than the FIFO size. |