13.4.3.2 SPI TxRx Data Frame Register (TXRXDF_SIZE)
The following table provides details about the Transmit Receive Data Frame register. The width of the data frame is set using this register.
| Bit Number | Name | R/W | Reset Value | Description |
|---|---|---|---|---|
| [31:6] | Reserved | R/W | 0 | Software must not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit must be preserved across a read-modify-write operation. |
| [5:0] | TXRXDFS | R/W | 0x04 | Transmit and receive data size. Maximum value
is 32. Number of bits shifted out and received per frame (count starts from
1). In National Semiconductor MICROWIRE mode, this is the number of shifts to be done after the control byte is sent. This register must be set before SPI is enabled. Writes to this register are ignored after SPI is enabled. |