15.3.4 Source Clock Selection Fail Status Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Gray cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| C | Write to clear | S | Software settable bit | x | Channel number |
| Name: | SCSFAIL |
| Offset: | 0x3108 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| PLLSCS2 | PLLSCS1 | ||||||||
| Access | HS/R/W | HS/R/W | |||||||
| Reset | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CLKSCS13 | CLKSCS12 | CLKSCS11 | CLKSCS10 | CLKSCS9 | |||||
| Access | HS/R/W | HS/R/W | HS/R/W | HS/R/W | HS/R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLKSCS8 | CLKSCS7 | CLKSCS6 | CLKSCS5 | CLKSCS3 | CLKSCS2 | CLKSCS1 | |||
| Access | HS/R/W | HS/R/W | HS/R/W | HS/R/W | HS/R/W | HS/R/W | HS/R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 25 – PLLSCS2 PLL #2 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it cannot correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 24 – PLLSCS1 PLL #1 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it cannot correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 12 – CLKSCS13 Clock Generator #13 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 11 – CLKSCS12 Clock Generator #12 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 10 – CLKSCS11 Clock Generator #11 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 9 – CLKSCS10 Clock Generator #10 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 8 – CLKSCS9 Clock Generator #9 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 7 – CLKSCS8 Clock Generator #8 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 6 – CLKSCS7 Clock Generator #7 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 5 – CLKSCS6 Clock Generator #6 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 4 – CLKSCS5 Clock Generator #5 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 2 – CLKSCS3 Clock Generator #3 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 1 – CLKSCS2 Clock Generator #2 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
Bit 0 – CLKSCS1 Clock Generator #1 SCS (Source Clock Selection) Circuitry Fail Status bit
| Value | Description |
|---|---|
| 1 | Source clock selection circuitry detected a failure that it can not correct |
| 0 | Circuit is correctly selecting the chosen source reference clock |
