3.4.3.4.1.1 RXBC1 – RX Buffer Configuration Register 1
| Name: | RXBC1 |
| Offset: | 0x12F |
| Reset: | 0x00 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RXMSBB | RXCBLB[1:0] | RXCEB | RXMSBA | RXCBLA[1:0] | RXCEA | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – RXMSBB Receive Data MSB-First for Data Path B
1 =
Data is shifted into the shift register MSB-first0 = Data is
shifted into the shift register LSB-first
Bits 6:5 – RXCBLB[1:0] Receive CRC Bit Lengths Setting for Data Path B
| RXCBLB | Description |
|---|---|
00 | CRC 4-bit configuration |
01 | CRC 8-bit configuration |
10 | Not used (4-bit configuration default) |
11 | CRC 16-bit configuration |
Bit 4 – RXCEB RX CRC Enable Data Path B
1 = CRC is
enabled0 = CRC is disabled
Bit 3 – RXMSBA Receive Data MSB-First for Data Path A
1 = Data is
shifted into the shift register MSB-first0 = Data is shifted
into the shift register LSB-first
Bits 2:1 – RXCBLA[1:0] Receive CRC Bit Lengths Setting for Data Path A
| RXCBLAth | Description |
|---|---|
00 | CRC 4-bit configuration |
01 | CRC 8-bit configuration |
10 | Not used (4-bit configuration default) |
11 | CRC 16-bit configuration |
Bit 0 – RXCEA RX CRC Enable Data Path A
1 = CRC is
enabled0 = CRC is disabled