21.3.51 generate_component
(Ask a Question)Description
This Tcl command generates a SmartDesign or a core component VHDL code. After generating component, the VHDL file is placed in the <project_folder>/component/work/<component_name> folder.
generate_component -component_name "component_name" \
[-recursive 0|1 ]Arguments
| Parameter | Type | Description |
|---|---|---|
| component_name | string | Specifies the name of the SmartDesign component or the core component is generated. It is mandatory. |
| recursive | integer | Specifies if a SmartDesign component must be generated recursively. It is optional. It is ‘0’ by default and generates only the specified component. If set to ‘1’, all the dependent components, which are in ungenerated state will be generated along with the SmartDesign component. It is recommended to generate all components individually. |
Error Codes
Error Code | Description |
|---|---|
None | Parameter 'component_name' cannot be empty. |
None | recursive: Invalid argument value: 'value' (expecting TRUE, 1, true, FALSE, 0 or false). |
None | Parameter 'param_name' is not defined. Valid command formatting is 'generate_component [-component_name "component_name"] [-name "name"] [-recursive "TRUE | FALSE"]' . |
Supported Families
| Supported Families |
|---|
| PolarFire® |
| RTG4™ |
| SmartFusion® 2 |
| IGLOO® 2 |
Example
The following command generates SmartDesign "sd2" only.
generate_component -component_name {sd2}The following command generates SmartDesign "TOP" and all its dependent components, which are in ungenerated state.
generate_component -component_name {TOP} -recursive 1