21.3.42 export_netlist_file
(Ask a Question)Description
This Tcl command exports the netlist after the compile state has completed. The netlist can be either Verilog or VHDL. Microchip recommends exporting the netlist after the compile state has successfully completed.
export_netlist_file \
-file { absolute or relative path and filename for netlist } \
[-vhdl { value }]Arguments
| Parameter | Type | Description |
|---|---|---|
| file | string | Specifies the absolute or relative path and name of netlist file. If specified relative path of netlist file created in <project_name>/designer/<design_name> directory. |
| vhdl | boolean | Generates the netlist in VHDL (when set to "TRUE" or 1) or Verilog (when set to "FALSE" or 0). Default is 0 (Verilog netlist). |
Error Codes
| Error Code | Description |
|---|---|
| None | Required parameter 'file' is missing. |
None | vhdl: Invalid argument value: 'value' (expecting TRUE, 1, true, FALSE, 0 or false). |
None | Parameter 'param_name' is not defined. Valid command formatting is 'export_netlist_file -file "Export Netlist" \ [-vhdl "TRUE | FALSE"] '. |
Supported Families
| Supported Families |
|---|
| PolarFire® |
| RTG4™ |
| SmartFusion® 2 |
| IGLOO® 2 |
Example
The following command exports the netlist (Verilog) after the compile state has completed.
export_netlist_files -file {E:/designs/export/sd1/sd1.v} -vhdl 0