21.3.91 set_option

Description

This Tcl command sets your synthesis and FPGA Hardware Breakpoint Auto Instantiation options on a module. Default values are used if parameters are omitted.

set_option [-synth "TRUE | FALSE" ] [-fhb "TRUE | FALSE" ] \
          [-module "module_name"]

Arguments


Parameter	Type	Description
synth	boolean	Enables/Disables Libero synthesis tool for root design in your project. Default is 1. Possible values are: TRUE \| true \| 1 - Enables synthesis tool for your design. Default value. FALSE \| false \| 0 - Disables synthesis tool for your design.
fhb	boolean	TRUE \| true \| 1 - Enables FPGA Hardware Breakpoint Auto Instantiation. Default value. FALSE \| false \| 0 - Disable FPGA Hardware Breakpoint Auto Instantiation.
module	string	Identifies the module on which you will run synthesis. Default is {<root_design_name>::work}.

Error Codes


Error Code	Description
None	Project Manager does not support PLACE, you cannot activate it in the flow.
None	Cannot find module named "top".
None	Parameter 'module' has illegal value.
None	synth: Invalid argument value: 'value' (expecting TRUE, 1, true, FALSE, 0 or false).
None	fhb:Invalid argument value: ' ' (expecting TRUE, 1, true, FALSE, 0 or false).
None	Parameter 'module' has illegal value.
None	Parameter 'param_name' is not defined. Valid command formatting is 'set_option [-synth "TRUE \| FALSE"] [-fhb "TRUE \| FALSE"] [-module "module"]

Supported Families


Supported Families
PolarFire®
RTG4™
SmartFusion® 2
IGLOO® 2

Example

The following command sets synthesis option on the module top.vhd.

set_option -synth "TRUE" -module "top"