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20.18.29 PMC Peripheral Clock Status Register 0 “PIDx” refers to
identifiers as defined in the section “Peripheral Identifiers”.The
following configuration values are valid for all listed bit names of this
register:
0: The corresponding peripheral clock is
disabled.
1: The corresponding peripheral clock is
enabled.
Name: PMC_CSR0 Offset: 0x00A4 Reset: 0x00000000 Property: Read-only
Bit 31 30 29 28 27 26 25 24 PID31 PID30 PID28 PID25 PID24 Access R R R R R Reset 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 PID23 PID17 PID16 Access R R R Reset 0 0 0
Bit 15 14 13 12 11 10 9 8 PID15 PID14 PID13 PID12 PID11 PID10 PID9 Access R R R R R R R Reset 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 Access Reset
Bits 30, 31 – PID30, PID31 Peripheral Clock x Status
Bit 28 – PID28 Peripheral Clock x
Status
Bits 23, 24, 25 – PID23, PID24,
PID25 Peripheral Clock x Status
Bits 9, 10, 11, 12, 13, 14, 15, 16, 17 – PID9, PID10, PID11, PID12, PID13, PID14, PID15, PID16,
PID17 Peripheral Clock x
Status
On this page
Bits 30, 31 – PID30, PID31 Peripheral Clock x Status Bit 28 – PID28 Peripheral Clock x
Status Bits 23, 24, 25 – PID23, PID24,
PID25 Peripheral Clock x Status Bits 9, 10, 11, 12, 13, 14, 15, 16, 17 – PID9, PID10, PID11, PID12, PID13, PID14, PID15, PID16,
PID17 Peripheral Clock x
Status
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