20.18.19 PMC Wake-Up Control Register
| Name: | PMC_WCR |
| Offset: | 0x0078 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| CMD | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| WIEN1 | WIP | EN | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WKPIONB[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bit 24 – CMD Command
| Value | Description |
|---|---|
| 0 | Read mode. |
| 1 | Write mode. |
Bit 20 – WIEN1 Wake-up Input Enable 1
| Value | Description |
|---|---|
| 0 |
The selected wake-up input has no effect on the PMC Core 1. |
| 1 |
The selected wake-up input enables a fast restart signal to the PMC Core 1. |
Bit 17 – WIP Wake-up Input Polarity
Defines the active polarity of the selected wake-up input. If the corresponding wake-up input is enabled at the FSTP level, it enables a fast restart signal.
Bit 16 – EN Wake-up Input Enable
| Value | Description |
|---|---|
| 0 | The selected wake-up input has no effect on the PMC Core 0. |
| 1 | The selected wake-up input enables a fast restart signal to the PMC Core 0. |
Bits 3:0 – WKPIONB[3:0] Wake-up Input Number
Defines which wake-up source is to be modified during a write access (CMD is set to ‘1’) or which wake-up source status is read on the next read access to this register (CMD is set to ‘0’).,
| Primary Signal Name | WKPIONB |
|---|---|
| WKUP0 | 0 |
| WKUP1 | 1 |
| WKUP2 | 2 |
| PA2 | 3 |
| PA3 | 4 |
| PA5 | 5 |
| PA9 | 6 |
| PA13 | 7 |
| PB25 | 8 |
| PB9 | 9 |
| PB12 | 10 |
| PC7 | 11 |
| PC9 | 12 |
| PC14 | 13 |
| PC21 | 14 |
| WOD (Wake-up from debug) | 15 |