20.18.3 PMC System Clock Status Register
| Name: | PMC_SCSR |
| Offset: | 0x0008 |
| Reset: | 0x00000003 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| CPBMCK | CPCK | ||||||||
| Access | R | R | |||||||
| Reset | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PCK3 | PCK2 | PCK1 | PCK0 | ||||||
| Access | R | R | R | R | |||||
| Reset | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CPU_CLK1S | CPU_CLK0S | ||||||||
| Access | R | R | |||||||
| Reset | 1 | 1 |
Bit 17 – CPBMCK Coprocessor Main System Bus Clocks Status
| Value | Description |
|---|---|
| 0 | The Coprocessor Main System Bus Clocks are disabled. |
| 1 | The Coprocessor Main System Bus Clocks are enabled. |
Bit 16 – CPCK Coprocessor (Second Processor) Clock Status
| Value | Description |
|---|---|
| 0 |
The Coprocessor Clock (CPU_CLK1) is disabled. |
| 1 |
The Coprocessor Clock (CPU_CLK1) is enabled. |
Bits 8, 9, 10, 11 – PCKx Programmable Clock x Output Status
| Value | Description |
|---|---|
| 0 | The corresponding Programmable Clock output is disabled. |
| 1 | The corresponding Programmable Clock output is enabled. |