20.18.10 PMC Clock Generator Main Oscillator Register
This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode Register.
| Name: | CKGR_MOR |
| Offset: | 0x0024 |
| Reset: | 0x00000008 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| BMCKRST | XT32KFME | CFDEN | MOSCSEL | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| KEY[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| MOSCXTST[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| MOSCRCEN | WAITMODE | MOSCXTBY | MOSCXTEN | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 1 | 0 | 0 | 0 |
Bit 27 – BMCKRST Bad MCK0 Clock Reset Enable
| Value | Description |
|---|---|
| 0 | An MCK0 clock failure detection cannot reset the system. |
| 1 | An MCK0 clock failure detection can reset the system if the reset controller is configured accordingly. |
Bit 26 – XT32KFME 32.768 kHz Crystal Oscillator Frequency Monitoring Enable
| Value | Description |
|---|---|
| 0 | The 32.768 kHz crystal oscillator frequency monitoring is disabled. |
| 1 | The 32.768 kHz crystal oscillator frequency monitoring is enabled. |
Bit 25 – CFDEN Clock Failure Detector Enable
| Value | Description |
|---|---|
| 0 | The clock failure detector is disabled. |
| 1 | The clock failure detector is enabled. |
Bit 24 – MOSCSEL Main Clock Oscillator Selection
| Value | Description |
|---|---|
| 0 | The Main RC oscillator is selected. |
| 1 | The Main crystal oscillator is selected. |
Bits 23:16 – KEY[7:0] Write Access Password
| Value | Name | Description |
|---|---|---|
| 0x37 | PASSWD |
Writing any other value in this field aborts the write operation. Always reads as 0. |
Bits 15:8 – MOSCXTST[7:0] Main Crystal Oscillator Start-up Time
Specifies the number of MD_SLCK cycles multiplied by 8 for the main crystal oscillator start-up time.
Bit 3 – MOSCRCEN Main RC Oscillator Enable
When MOSCRCEN is set, the MOSCRCS flag is set once the Main RC oscillator start-up time is achieved.
| Value | Description |
|---|---|
| 0 | The Main RC oscillator is disabled. |
| 1 | The Main RC oscillator is enabled. |
Bit 2 – WAITMODE Wait Mode Command (write-only)
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Puts the device in Wait mode. |
Bit 1 – MOSCXTBY 12 to 48 MHz Crystal Oscillator Bypass
When MOSCXTBY = 0, the MOSCXTS flag must be read at 0 in PMC_SR before enabling the crystal oscillator (MOSCXTEN = 1).
When MOSCXTBY = 1, the MOSCXTS flag in PMC_SR is automatically set to 1.
Clearing MOSCXTEN and MOSCXTBY bits resets the MOSCXTS flag.
| Value | Description |
|---|---|
| 0 |
No effect. |
| 1 |
The 12 to 48 MHz crystal oscillator is bypassed. MOSCXTEN must be cleared. An external clock must be connected on XIN. |
Bit 0 – MOSCXTEN Main Crystal Oscillator Enable
A crystal must be connected between XIN and XOUT.
When MOSCXTEN is set, the MOSCXTS flag is set once the Main crystal oscillator start-up time is achieved.
| Value | Description |
|---|---|
| 0 | The Main crystal oscillator is disabled. |
| 1 | The Main crystal oscillator is enabled. MOSCXTBY must be cleared. |