“PIDx” refers to
identifiers as defined in the section “Peripheral Identifiers”.
The
following configuration values are valid for all listed bit names of this
register:
0: The corresponding peripheral clock is
disabled.
1: The corresponding peripheral clock is
enabled.
Name:
PMC_CSR2
Offset:
0x00AC
Reset:
0x00000000
Property:
Read-only
Bit
31
30
29
28
27
26
25
24
PID91
PID90
PID89
PID88
Access
R
R
R
R
Reset
0
0
0
0
Bit
23
22
21
20
19
18
17
16
PID87
PID85
PID81
PID80
Access
R
R
R
R
Reset
0
0
0
0
Bit
15
14
13
12
11
10
9
8
PID79
PID78
PID75
Access
R
R
R
Reset
0
0
0
Bit
7
6
5
4
3
2
1
0
Access
Reset
Bits 23, 24, 25, 26, 27 – PID87, PID88, PID89, PID90,
PID91 Peripheral Clock x Status
Bit 21 – PID85 Peripheral Clock x
Status
Bits 14, 15, 16, 17 – PID78, PID79, PID80,
PID81 Peripheral Clock x Status
Bit 11 – PID75 Peripheral Clock x
Status
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
