9.3.8.1 DEV_CTRL_REG Bit Definitions

Table 9-52. DEV_CTRL_REG (0x40043060)
Bit Number Name Reset Value Function
7 B-Device 1 Indicates whether the USB controller is operating as the A device or the B device.

0: A device

1: B device

Only valid while a session is in progress. To determine the role when no session is in progress, set the session bit and read this bit.

If the core is in Force_Host mode (a session has been started with TESTMODE_REG.bit[7] = 1), this bit indicates the state of the FAB_HOSTDISCON input signal.

6 FSDev 0 This read-only bit is set when a full speed or high speed device has been detected being connected to the port. High-speed devices are distinguished from full speed by checking for high-speed chirps when the device is reset. Only valid in Host mode.
5 LSDev 0 This read-only bit is set when a low-speed device is detected being connected to the port. Only valid in Host mode.
[4:3] Vbus[1:0] 0 These read-only bits encode the current VBus level as given in Table 9-53.
2 Host Mode 0 This read-only bit is set when the USB controller is acting as a host.
1 Host Req 0 When set, the USB controller initiates the host negotiation when Suspend mode is entered It is cleared when host negotiation is completed. (B device only).
0 Session 0 When operating as an A device, this bit is set or cleared by the Cortex-M3 processor (or fabric master) to start or end a session. When operating as a B device, this bit is set/cleared by the USB controller when a session starts/ends. It is also set by the Cortex-M3 processor (or fabric master) to initiate the session request protocol. When the USB controller is in Suspend mode, the bit gets cleared by the Cortex-M3 processor (or fabric master) to perform a software disconnect.

Clearing this bit when the core is not suspended results in undefined behavior.