10.1.1 Accumulator
An accumulator is a sequential logic block that stores and updates a running total by adding input data to its current value on each clock cycle.
The following figure displays an accumulator.

Supported Families
The following is a list of the supported families:
- IGLOO®
- ProASIC® 3
- SmartFusion®
- Fusion®
- ProASICPLUS®
- ProASIC®
- Axcelerator®
- SX-S
- SX-A
- eX
Related Topics
Key Features
An accumulator has the following key features:
- Parameterized word length
- Optional carry-in and carry-out signals
- Asynchronous reset
- Accumulator enable
- Multiple gate-level implementations (speed/area tradeoffs)
- Behavioral simulation mode in VHDL and Verilog
