10.1.27 Multiplexor
A Multiplexor is a configurable logic block that selects one of several input signals and routes it to a single output based on a selection control.
The following figure displays the view of the Multiplexor element.
Supported Families
The following is a list of the supported families:
- IGLOO®
- ProASIC®3
- SmartFusion®
- Fusion®
- ProASIC® PLUS
- ProASIC®
- Axcelerator®
- RTAX-S
- eX
- SX-A
Related Topics
Key Features
- Parameterized word length
- Parameterized multiplexer input number
- Behavioral simulation RTL in VHDL and Verilog