10.1.25 Logic - OR

Logic - OR is a configurable logic block that performs a logical OR operation across multiple input signals and produces a single output result.

The following figure displays the view of the Logic - OR element.

Figure 10-27. Logic - OR
Logic OR element

Supported Families

The following is a list of the supported families:
  • IGLOO®
  • ProASIC®3
  • SmartFusion®
  • Fusion®
  • ProASIC®PLUS
  • ProASIC®
  • Axcelerator®
  • RTAX-S
  • eX
  • SX-A

Related Topics

Key Features

  • Parameterized OR size
  • Behavioral simulation RTL in VHDL and Verilog