3.4.3.8.1.13 SOTSB – Start Of Telegram Status for Path B

Note:

Set to hardware-controlled read-only mode if the get_rx_telegram state machine is active.

Name:	SOTSB
Offset:	0x091
Reset:	0x00

This register displays the status of all start of telegram conditions. The corresponding bit is set to ‘1’ if the condition has matched. It is cleared if a ‘1’ is written to its position or the receiving path B is disabled (RDPR.PRFLT = 1 or RDPR.PRPTB = 1). The flags are handled by the hardware if the get_rx_telegram state machine (SSMRR.SSMR) is activated. In this case, the flags are cleared if an activated error condition for RDSIFR.EOTB occurs. This is done automatically by toggling the RDPR.APRPTB bit.


Bit	7	6	5	4	3	2	1	0
	WCOAO	RROB	SFIDOB	WUPOB	MANOB	SYTOB	AMPOB	CAROB
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bit 7 – WCOAO Wake Check OK on Path A OK

The bit is set at a successful wake check OK from path A (RDSIFR.WCOA) that can be used as a precondition for a successful wake check (RDSIFR.WCOB) and start of telegram (RDSIFR.SOTB) detection on path B. It is cleared if a ‘1’ is written to its position, a ‘1’ is written to the RDSIFR.SOTB interrupt flag, or the receiving path B is disabled.

Bit 6 – RROB RSSI Range OK on Path B

This bit is set if the received signal strength on path B is within the expected range. The RSSI comparison is based on the first averaged RSSI sample after RX start-up. A failure of this check is indicated by the setting of the RSSFB flag in the EOTSB register. It is cleared if a ‘1’ is written to its position, a ‘1’ is written to the RDSIFR.SOTB interrupt flag, or the receiving path B is disabled.

Bit 5 – SFIDOB Start of Frame Identifier Matched on Path B

This bit indicates a successful correlator-based start of frame ID check. It is cleared if a ‘1’ is written to its position, a ‘1’ is written to the RDSIFR.SOTB interrupt flag, or the receiving path B is disabled.

Bit 4 – WUPOB Wake-Up Pattern Matched on Path B

This bit is set if the wake-up pattern match occurred. It is cleared if a ‘1’ is written to its position, a ‘1’ is written to the RDSIFR.SOTB interrupt flag, or the receiving path B is disabled.

Bit 3 – MANOB Manchester Coding OK on Path B

This bit is set if the manchester coding check is OK. The manchester coding is verified for the duration specified in the SYCSB register. If it was right for this duration, it is considered OK. A failure of this check is indicated by the setting of the MANFEB flag in the EOTSB register. It is cleared if a ‘1’ is written to its position, a ‘1’ is written to the RDSIFR.SOTB interrupt flag, or the receiving path B is disabled.

Bit 2 – SYTOB Symbol Timing OK on Path B

This bit is set if the symbol timing check is OK. The symbol timing is verified for the duration specified in the SYCSB register. If it was right for this duration, it is considered OK. A failure of this check is indicated by the setting of the SYTFEB flag in the EOTSB register. It is cleared if a ‘1’ is written to its position, a ‘1’ is written to the RDSIFR.SOTB interrupt flag, or the receiving path B is disabled.

Bit 1 – AMPOB Amplitude OK on Path B

This bit is set if the signal amplitude inside the demodulator is above a specified threshold (DMMB.DMATB). A failure of this check is indicated by the setting of the AMPFB flag in the EOTSB register. It is cleared if a ‘1’ is written to its position, a ‘1’ is written to the RDSIFR.SOTB interrupt flag, or the receiving path B is disabled.

Bit 0 – CAROB Carrier Check OK on Path B

This bit is set by a successful signal carrier check. A failure of this check is indicated by the setting of the CARFB flag in the EOTSB register. It is cleared if a ‘1’ is written to its position, a ‘1’ is written to the RDSIFR.SOTB interrupt flag, or the receiving path B is disabled.