3.4.3.8.1.19 EOTC1B – End of
Telegram Conditions 1 for Path B
This register is used
only for hardware-controlled automatic telegram reception. It stores the EOTCB settings
that are valid from the start of the reception until a wake check OK (RDSIFR.WCOB) is
detected. The sequencer state machine copies its content at the beginning of the
reception to the EOTCB register.Note: The bit descriptions are found at the EOTCB target
register.
| Name: | EOTC1B |
| Offset: | 0x0F8 |
| Reset: | 0x00 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | EOTAFE | RRFEB | TELREB | TMOFEB | MANFEB | SYTFEB | AMPFEB | CARFEB | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bit 7 – EOTAFE
Bit 6 – RRFEB
Bit 5 – TELREB
Bit 4 – TMOFEB
Bit 3 – MANFEB
Bit 2 – SYTFEB
Bit 1 – AMPFEB
Bit 0 – CARFEB
