3.4.3.8.1.5 RDOCR – RX DSP Output Control
| Name: | RDOCR |
| Offset: | 0x099 |
| Reset: | 0x00 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ETRPB | ETRPA | TMDS1 | TMDS0 | ||||||
| Access | R | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – Reserved Bit
0’ when read.Bit 6 – Reserved Bit
0’.Bit 5 – Reserved Bit
0’.Bit 4 – ETRPB Enable Transparent Path B
Bit 3 – ETRPA Enable Transparent Path A
Bit 2 – TMDS1 Transparent Mode Data Select
Bit 1 – TMDS0 Transparent Mode Data Select
| TMDS1 | TMDS0 | Description |
|---|---|---|
| Bit 2 | Bit 1 | |
0 | 0 | No transparent demodulator output on TMDO. Transparent output function is deactivated and has no influence on the pin behavior. |
0 | 1 |
Receiver path A data is selected for transparent data output. The data signal is visible at TMDO (pin 17) after a successful wake check (WCOA). The corresponding data clock is visible at the TMDO_CLK (pin 19) pin after a successful start of telegram (SOTA) detection. |
1 | 0 |
Receiver path B data is selected for transparent data output. The data signal is visible at TMDO (pin 17) after a successful wake check (WCOB). The corresponding data clock is visible at the TMDO_CLK (pin 19) pin after a successful start of telegram (SOTB) detection. |
1 | 1 | No transparent demodulator output on TMDO. Transparent output function is deactivated and has no influence on the pin behavior. |
Bit 0 – Reserved Bit
0’ when read.